Q&A: What is the difference between the BUSY and TXBUSY bits in the UART Flag Register?

The difference between the TXBUSY and BUSY bits is that the TXBUSY bit indicates that the UART is in the middle of a transmit operation and when it clears, the TXCMP bit is set. The TXBUSY bit is tied to and can trigger, if configured, the transmit complete (TXCMPMxxxx) interrupt as indicated by bit 0 in the UART’s Interrupt Enable (IER), Interrupt Status (IES), Masked Interrupt Status (MIS) and Interrupt Clear (IEC) registers.

The BUSY bit indicates that the UART is active, either for a transmit or receive operation.  The BUSY bit will always be asserted whenever the TXBUSY bit is asserted, and will also be asserted when the UART is enabled to receive (whether a receive operation is actually occurring or not).