This space explains Apollo3-Blue Patch application and includes information about the currently available patches and their application.
Patch Descriptions
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#
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Patch Binary
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Impact
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Purpose
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Part Revisions
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| 1 |
simobuck_core_active_trim_init_value += 12 d2a_spare_init_value = 1 |
Workaround to production screen issue where margin testing (DCOVER) is not being performed. | Rev A1 | |
| 2 |
blebuck_pullup_trim_init_value = 0 blebuck_zx_trim_init_value = 3 |
Reduces the current spikes seen prior to each BLE operation. Without this change, customers running the chip at 3V will see larger BLE buck ripple, which will result in slightly higher power consumption. |
Rev A1 | |
| 3 |
simobuck_core_active_trim_init_value += 24 simobuck_mem_active_trim_init_value += 10 d2a_spare_init_value = 1 |
Increase active VDDC and VDDF to guarantee A1 parts can operate MSPI and IOM at 48MHz clock rate. |
Rev A1 | |
| 4 | am_patch_ota_SIMOBUCK_CORE_RESET.bin | simobuck_core_active_trim_init_value -= 12 | Removes the increase from patch #1 above. | Rev A1 |
| 5 | (Internal Only) | |||
| 6 | (Internal Only) | |||
| 7 |
simobuck_core_active_trim_init_value += 12 d2a_spare_init_value = 1 blebuck_pullup_trim_init_value = 0 |
Combines patch #3 with only the BLE Buck Pullup trim change from patch #2 | Rev A1 | |
| 8 | am_patch_ota_SIMOBUCK_CORE_MEM_ACTIVE_LP.bin |
simobuck_core_active_trim_init_value += 12 simobuck_core_lp_trim_init_value += 13 simobuck_mem_active_trim_init_value += 8 simobuck_mem_lp_trim_init_value += 20 |
Patch for SIMOBUCK Brown-out/Reset and DCOVER margin (combined) | Rev A1 |
| 9 | (Internal Only) |
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| 10 | am_patch_ota_B0_BLEBUCKPULLUPF.bin |
blebuck_pullup_trim_init_value = 0xF |
B0 patch to reduce the current spike from the 3V battery when the BLE buck turns on. | Rev B0 |
| 11 | am_patch_ota_D2ASPARE0_SIMOBUCK_CORE_MEM_ACTIVE_LP_CLKDIV_BLEBUCK_PUP_DELAY.bin |
simobuck_core_active_trim_init_value += 12 simobuck_core_lp_trim_init_value += 13 simobuck_mem_active_trim_init_value += 8 simobuck_mem_lp_trim_init_value += 20 d2a_spare_init_value = 0 |
Modified A1 patch to fix VDDC and VDDF voltage margin and simobuck brownout issues | Rev A1 |
Patch Update JLink Script: jlink-update-patch.txt
Patch Version Word Decoding
| Version Word | Address | Fields | Description | Part Rev |
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INFO1_ PATCHVER2 |
0x50023828 | Bit 0 - VDDC SIMOBUCK Active Trim #1 | 1 = Production Default; 0 = +30mV (12 steps) | A1 |
| Bit 1 - VDDF SIMOBUCK Active Trim #1 | 1 = Production Default; 0 = +60mV (9 steps) | A1 | ||
| Bit 2 - D2ASPARE Init #1 | 1 = Production Default (0x3); 0 = d2a_spare_init_value to 1. | A1 | ||
| Bit 3 - VDDF SIMOBUCK Active Trim #2 | 1 = Production Default; 0 = +120mV (18 steps) | A1 | ||
| Bit 4 - BLE Buck Pull-up #1 | 1 = Production Default; 0 = blebuck_pullup_trim_init_value to 0. | A1 | ||
| Bit 5 - BLE Buck Zero Crossing | 1 = Production Default; 0 = blebuck_zx_trim_init_value to 3. | A1 | ||
| Bit 6 - VDDC SIMOBUCK Active Trim #3 | 1 = Production Default; 0 = +130mV (40 steps) | A1 | ||
| Bit 7 - VDDF SIMOBUCK Action Trim #3 | 1 = Production Default; 0 = +130mV (20 steps) | A1 | ||
| Bit 8 - VDDBH Drive Strength | 1 = Production Default; 0 = blebuck_pullup_trim_init_value to 0xF. | A1 | ||
| Bit 9 - BLE Buck Active Trim | 1 = Production Default; 0 = blebuck_active_trim_init_value to 0x19 | A1 | ||
| Bit 10 - VDDC LDO Active Trim #1 | 1 = Production Default; 0 = coreldo_active_trim_init_value + 11 steps | A1 | ||
| Bit 11 - SIMOBUCK COMP2 Timeout Enable | 1 = Production Default; 0 = simobuck_comp2_timeout_en_init_value to 0x1 | A1 | ||
| Bit 12 - D2ASPARE Init #2 | 1 = Production Default; 0 = d2a_spare_init_value to 0. | A1 | ||
| Bit 13 - SIMOBUCK CLKDIV SEL | 1 = Production Default; 0 = simobuck_clkdiv_sel_init_value to 0x0 | A1 | ||
| Bit 14 - SIMOBUCK VDDC +40mV VDDF +60mV | 1 = Production Default; 0 = simobuck_core_active_trim_init_value + 24 & simobuck_mem_active_trim_init_value + 10 | A1 | ||
| Bit 15 - SIMOBUCK VDDF Active +50mV | 1 = Production Default; 0 = simobuck_mem_active_trim_init_value += 8 | A1 | ||
| Bit 16 - SIMOBUCK VDDC Low Power + 60-70mV | 1 = Production Default; 0 = simobuck_core_lp_trim_init_value += 13 | A1 | ||
| Bit 17 - SIMOBUCK VDDF Low Power +60-70mV | 1 = Production Default; 0 = simobuck_mem_lp_trim_init_value += 20 | A1 | ||
| Bit 18 - Bit 31 | Reserved for future. | |||
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INFO1_ PATCHVER3 |
0x5002382C | Bit 0 - VDDC SIMOBUCK Core Active +30mV | 1 = Production Default; 0 = simobuck_core_active_trim_init_value +12 | Pre-Production B0 |
| Bit 1 - VDDF SIMOBUCK Mem Active + 30mV | 1 = Production Default; 0 = simobuck_mem_active_trim_init_value +5 | Pre-Production B0 | ||
| Bit 2 - VDDC SIMOBUCK Core LP +30mV | 1 = Production Default; 0 = simobuck_core_lp_trim_init_value +5 | Pre-Production B0 | ||
| Bit 3 - VDDF SIMOBUCK Mem LP +30mV | 1 = Production Default; 0 = simobuck_mem_lp_trim_init_value +5 | Pre-Production B0 | ||
| Bit 4 - XTAL ICOMP Trim to A1 Default | 1 = Production Default; 0 = xtal_icomp_trim_init_value = 1 | Pre-Production B0 | ||
| Bit 5 - Bit 31 | Reserved for future. |