Overview
This design guideline describes the recommended external circuit components and MCU pins required to supply an external 32.768 kHz clock to the Apollo2, Apollo2 Blue, and Apollo3 Blue MCUs.
Applicable Silicon Revisions and Packages
This design guideline applies to all versions and packages of Apollo2, Apollo2 Blue, and Apollo3 Blue MCUs, collectively called Apollo family or Apollo MCUs.
Application Impact
Following these recommendations ensures that the Apollo MCU is clocked reliably and safely with an external clock source.
Guidelines
Due to design requirements, some customers prefer to use an external oscillator (XO) device, or a temperature-controlled external oscillator (TCXO) as a replacement for the 32.768 kHz crystal. The Apollo MCU’s crystal oscillator can be adapted to work with an external clock fed into the Apollo’s XO pin.
There are two requirements to enable external clocking of the MCU - an acceptable clock signal/circuit and correct register configuration.
Clock Signal and Circuit
The crystal-controlled oscillator circuit requires a clock input which meets a specific range of frequency, amplitude and duty cycle. Figure 1 shows the recommended circuit diagram, components, and MCU pin connections using a 32.768 kHz external clock (32K_EXTCLK) with peak-to-peak voltage variation allowance from 1.5V to 3.6V.
Figure 1. External 32.768 kHz Crystal Clock Circuit Diagram
The recommended circuit must meet the following requirements:
- 32K_EXTCLK:
- Frequency range: 32.768 kHz external clock source +/- 10% (29.491 - 36.044 kHz). Operation at any frequency above or below this range is not guaranteed.
- Duty cycle: 45% - 55%
- Amplitude (Vmin to Vmax peak-to-peak): Vmin = 0V to 0.2V and Vmax = 1.5V to 3.6V
- C1 capacitor
- Tolerance: 30%
- R1, R2, R3, R4 resistors
- Tolerance: 10%
- R3, R4 values cannot be changed if this resistor divider is powered from VDDF
- R2 value must be between 100 kΩ - 2.0 MΩ.
- R1, R2 values can be adjusted as long as the XO pin voltage requirements below are met.
- XO pin voltage requirements:
- Voltage input low range: 0 – 35mV
- Voltage input peak-to-peak: 340mV (nominal)
- Voltage input high range: 260mV – 440mV (recommended); 230mV – 600mV (acceptable)
- XI pin voltage requirements:
- Nominal: 130mV
- Maximum: 155mV
- Minimum: 105mV
- Maximum ripple: 10mV
The 32 kHz clock source, 32K_EXTCLK, should be located as close to the XO pin as possible and be routed away from high-switching signals. Trace length should be minimized such that total capacitive load (board + chip pad capacitance) on the XO net should not exceed 5 pF.
NOTE: The user/designer needs to be very careful when probing the net containing the XO pin (output of the resistor divider) and must use a FET probe or similar with ultra-high input impedance (10MΩ or greater) and very low capacitance (1pF or less).
Clock Duty Cycle
Figure 2 shows the CLKOUT duty cycle variation versus XO pin peak-to-peak voltage for 32K_EXTCLK input duty cycles of 45%, 50%, and 55% with an XI pin bias voltage of 135mV. Under typical conditions, an XO pin peak-to-peak voltage of 340mV will produce a nominal 50% CLKOUT duty cycle with a 50% 32K_EXTCLK input duty cycle.
Figure 2. CLKOUT Duty Cycle: XI Pin Voltage = 135 mV
Register Setting
The XTALBIASTRIM and the XTALKSBIASTRIM fields in the MCUCTRL_XTALGENCTRL register, located at address 0x40020124, must set the crystal bias current and the crystal bias kick start current, respectively, to the minimum setting. The XTALGENCTRL register fields are as shown in Table 1.
XTALGENCTRL Register
XTAL Oscillator General Control
ADDRESS: 0x40020124
Table 1. XTALGENCTRL Register Bits
Bit | Name | Reset | RW | Description |
31:14 | RSVD | 0x0 | RO | RESERVED. |
13:8 | XTALKSBIASTRIM | 0x1 | RW | XTAL IBIAS Kick start trim. This trim value is used during the startup process to enable a faster lock. |
7:2 | XTALBIASTRIM | 0x0 | RW | XTAL BIAS trim |
1:0 | ACWARMUP | 0x0 | RW | Auto-calibration delay control SEC1 = 0x0 - Warmup period of 1-2 seconds SEC2 = 0x1 - Warmup period of 2-4 seconds SEC4 = 0x2 - Warmup period of 4-8 seconds SEC8 = 0x3 - Warmup period of 8-16 seconds |
The XTALBIASTRIM and XTALKSBIASTRIM fields must be set to a value of 0 for the Apollo3 MCU, and 32 (decimal) for the Apollo2 and Apollo2 Blue MCUs.
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