Full question(s):
I am running execute-in-place (XIP) code with the MSPI module on the Apollo3 Blue, and I am experiencing bus fault errors. This fault is indicated in the core's BusFault Status Register (BFSR) within the Configurable Fault Status Register (CFSR) at address 0xe000ed28, reading 0x100, indicating that the IBUSERR bit was set. The Fault Exception Viewer window was as below. How do I prevent this from happening?
Answer(s):
Before any XIP operation, the XIPEN bit in the MSPI module's FLASH register at address 0x5001_410C must be set, otherwise the user will encounter a bus fault. As the Apollo3 Blue datasheet notes, setting this bit enables the address decoding of the MSPI device in the flash/cache address space at
address 0x04000000-0x07FFFFFF.
To set this bit, the user can call a function in the AmbiqSuite SDK named am_devices_mspi_psram_enable_xip(), located in the \devices\am_devices_mspi_psram.c file. Likewise, to disable XIP, set the XIPEN bit to 0 by calling am_devices_mspi_psram_disable_xip().
The MSPI must be initialized for operation with a particular device in order to use the XIP feature. Examples of how to do this can be found in AmbiqSuite SDK's mspi_octal_example and mspi_quad_example.
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